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april 2008 rev 1 1/56 56 AN2744 application note st7538q power line fsk transceiver dual channel reference design for amr introduction the st7538q dual channel reference design is a practical tool to start the activity of designing an automatic meter reading (amr) node based on the st7538q power line fsk transceiver. with this reference design, it is possible to evaluate the features of the st7538q and its transmitting and receiving performances in an actual communication on the power line network. the st7538q reference design can be considered as composed of three main sections: power supply section, specifically designed to coexist with power line communication and to operate from a wide-range input mains voltage modem and crystal oscillator section dual channel line coupling interface section the dual channel line coupling interface allows the st7538q fsk transceiver to transmit and receive on the mains using two different carrier frequencies: 72 khz and 86 khz, both within the frequency band a specified by the european cenelec en50065 standard for amr applications. figure 1. st7538q dual channel reference design board with outline dimensions as it can be seen from the picture above, a special effort has been made to develop a compact reference design board, oriented to practical applications. note: the information provided in this application note refers to the evalst7538dual reference design board. 56mm 98mm www.st.com
contents AN2744 2/56 contents 1 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2 safety precautions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 3 st7538q fsk power line transceiver descripti on . . . . . . . . . . . . . . . . 10 4 evaluation tools descripti on . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5 board description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.1 line coupling interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5.1.1 dual channel selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5.1.2 dual channel tx passive filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5.1.3 dual channel rx passive filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 5.1.4 dual channel rx active filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.1.5 input impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.2 conducted disturbances . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.2.1 conducted emissions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 5.2.2 noise immunity . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 5.3 thermal design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 5.4 oscillator section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 5.5 surge and burst protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 5.6 50-pin connector for communication board . . . . . . . . . . . . . . . . . . . . . . . 40 5.7 power supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 6 performance and ping tests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 7 application ideas . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 7.1 three-phase architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 7.2 received signal strength indica tion (rssi) . . . . . . . . . . . . . . . . . . . . . . . 47 7.3 110-132.5 khz dual channel coupling circuit . . . . . . . . . . . . . . . . . . . . . . 49 8 troubleshooting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 9 list of normative references . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
AN2744 contents 3/56 appendix a board layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 10 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
list of figures AN2744 4/56 list of figures figure 1. st7538q dual channel reference design board with outline dimensions . . . . . . . . . . . . . . . 1 figure 2. typical curve for output current limit vs. rcl value . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 3. st7538q transceiver block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 4. complete evaluation system including a pc, an evalcommboard and the evalst7538dual board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 figure 5. power line modem demonstration kit with transmission session window . . . . . . . . . . . . . . 13 figure 6. scheme of the various sections of the board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 figure 7. modem and coupling interface schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 8. power supply schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 9. schematic of rx and tx filters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 10. measured frequency response of the tx passive filter for 72 khz channel (typical). . . . . . 22 figure 11. measured frequency response of the tx passive filter for 86 khz channel (typical). . . . . . 23 figure 12. simulated frequency response of the tx passive filter for 72 khz channel with tolerance effect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 13. simulated frequency response of the tx passive filter for 86 khz channel with tolerance effect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 figure 14. measured frequency response of the rx passive filter for 72 khz channel (typical) . . . . . 25 figure 15. measured frequency response of the rx passive filter for 86 khz channel (typical) . . . . . 26 figure 16. simulated frequency response of the rx passive filter for 72 khz channel with tolerance effect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 figure 17. simulated frequency response of the rx passive filter for 86 khz channel with tolerance effect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 figure 18. measured frequency response of the rx active filter for 72 khz channel (typical) . . . . . . . 27 figure 19. measured frequency response of the rx active filter for 86 khz channel (typical) . . . . . . . 28 figure 20. simulated frequency response of the rx active filter for 72 khz channel with tolerance effect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 figure 21. simulated frequency response of the rx active filter for 86 khz channel with tolerance effect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 22. measured input impedance magnitude of the coupling interface in rx mode for the 72 khz channel (typical curve) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 figure 23. measured input impedance magnitude of the coupling interface in rx mode for the 86 khz channel (typical curve) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 figure 24. measured input impedance magnitude of the coupling interface in tx mode for the 72 khz channel (typical curve) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 figure 25. measured input impedance magnitude of the coupling interface in tx mode for the 86 khz channel (typical curve) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 figure 26. conducted disturbance test setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 figure 27. output spectrum (typical) at 72 khz channel, mains 220 vac, fixed transmitted tone = "1" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 figure 28. output spectrum (typical) at 86 khz channel, mains 220 vac, fixed transmitted tone = "1" . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 figure 29. narrowband conducted interference test setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 figure 30. measured ber vs. snr curve (typical), white noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 figure 31. measured snr vs. frequency curves (typical) at ber=10-3 - 72 khz channel . . . . . . . . . 35 figure 32. measured snr vs. frequency curves (typical) at ber=10-3 - 86 khz channel . . . . . . . . . 35 figure 33. pcb copper dissipating area for the st7538q dual channel reference design . . . . . . . . . 36 figure 34. packet-fragmented transmission . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 figure 35. thermal impedance typical curve for the st7538q mounted on the reference design board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 figure 36. a recommended oscillator sectio n layout for noise shielding . . . . . . . . . . . . . . . . . . . . . . . 38
AN2744 list of figures 5/56 figure 37. common mode disturbances protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 figure 38. differential mode disturbances protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 0 figure 39. scheme of the communication board connector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 figure 40. typical waveforms at 230 vac: open load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 figure 41. typical waveforms at 230 vac: full load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 4 figure 42. typical waveforms at 265 vac: short-circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 figure 43. typical waveforms at 265 vac: startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 4 figure 44. load regulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 figure 45. smps efficiency curve . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 figure 46. demonstration software window for the master board . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 figure 47. scheme of principle for three-phase architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 figure 48. peak detector electrical schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 figure 49. measured dc_out vs. ac_in peak detector performance . . . . . . . . . . . . . . . . . . . . . . . . 48 figure 50. pcb layout - top view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 figure 51. pcb layout - bottom view . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
list of tables AN2744 6/56 list of tables table 1. electrical characteristics of the st7538q dual channel reference design . . . . . . . . . . . . . . 7 table 2. output signal level setting through v sense partitioning - typical values . . . . . . . . . . . . . . . . 8 table 3. bill of materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 table 4. st parts on the st7538q dual channel reference design board . . . . . . . . . . . . . . . . . . . . 19 table 5. line coupling transformer specifications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 2 table 6. noise immunity test settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 table 7. 50-pin connector digital signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 table 8. 50-pin connector control signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 table 9. 50-pin connector power connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 table 10. smps specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 table 11. smps transformer specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 table 12. list of components to be modified for the 110-132.5 khz dual channel coupling. . . . . . . . 49 table 13. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
AN2744 electrical characteristics 7/56 1 electrical characteristics table 1. electrical characteristics of the st7538q dual channel reference design parameter value notes min. typ. max. operating condition ambient operating temperature 85 c if junction temperature exceeds 180 c the device shuts down transceiver section selectable channel frequencies: 72 khz (ch1), 86 khz (ch2) transmitting specif ications (tx mode) transmitting output voltage level 2 v rms 2.25 v rms r20 = 3.9 k , r22=2.2 k ? see ta b l e 2 transmitting output current limit 325 ma rms r19 = 2 k ? see figure 2 second harmonic distortion -55 db loaded with cispr 16-1 network third harmonic distortion -61 db loaded with cispr 16-1 network 50 hz attenuation 100 db receiving specifications (rx mode) minimum detectable rx signal 53 db/v rms ber<10 -3 , negligible noise auxiliary supply 5 v linear regulator (vdc) output voltage -5% 5.05 v +5% st7538q internally generated 5 v linear regulator (vdc) current capability 100 ma power supply section ac mains voltage range 85 v 265 v mains frequency 50-60 hz output voltage -10% 10 v +10% green led on output voltage ripple 1% i out = 600 ma, v in =85 v ac output current 600 ma output power 5.6 w efficiency at p out = 3.5 w 70% nominal transformer isolation (1) 4 kv primary to secondary/ secondary to auxiliary number of holdup cycles 0
electrical characteristics AN2744 8/56 note: 1 en50065-1 normative compliance is not guaranteed with a signal level at mains output greater than 2 v rms parameter value notes input power 100 mw switching frequency -10% 60 khz +10% transceiver section in tx mode 1. st does not guarantee transformer isolati on. st assumes no responsibility for the co nsequences that may result from that risk. table 1. electrical characteristics of the st7538q dual channel reference design (continued) table 2. output signal level setting through v sense partitioning - typical values v out [v rms ]v out [dbuv rms ](r 7 + r 8 ) / r 8 r 7 [k ]r 8 [k ] 1.000 120 1.25 0.910 2.2 1.125 121 1.4 1.3 2.2 1.250 122 1.6 2.2 2.2 1.500 124 2.0 2.7 2.2 1.800 125 2.25 3.3 2.2 2.000 126 2.5 3.9 2.2 2.250 ( note 1 ) 127 2.8 4.7 2.2 2.500 ( note 1 ) 128 3.15 6.8 2.2 3.000 ( note 1 ) 130 4.0 7.5 2.2 figure 2. typical curve for output current limit vs. r cl value 100 150 200 250 300 350 400 1.75 2 2.25 2.5 2.75 3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 rcl (kohm) irms (ma) 100 150 200 250 300 350 400 1.75 2 2.25 2.5 2.75 3 3.25 3.5 3.75 4 4.25 4.5 4.75 5 rcl (kohm) irms (ma)
AN2744 safety precautions 9/56 2 safety precautions the board must be used only by expert technicians. due to the high voltage (220 v ac) present on the parts which are not isolated, special care should be taken with regard to people's safety. there is no protection against high voltage accidental human contact. after disconnection of the board from the mains, none of the live parts should be touched immediately because of the energized capacitors. it is mandatory to use a mains insulation transformer to perform any tests on the high voltage sections (see circuit sections highlighted in figure 7 and figure 8 ) in which test instruments like spectrum analyz ers or oscilloscopes are used. do not connect any oscilloscope probes to high voltage sections in or der to avoid damaging instruments and demonstration tools. warning: st assumes no responsibility for any consequences which may result from the improper use of this tool.
st7538q fsk power line transceiver description AN2744 10/56 3 st7538q fsk power line transceiver description the st7538q transceiver performs a half-duplex communication over the power line network using frequency shift keying (fsk) modulation. it operates from a 7.5 to 12.5 v single supply voltage (pav cc ) and integrates a differential-output power line interface (pli) stage and two linear regulators providing 5 v (vdc) and 3.3 v (dv dd ). the st7538q can be programmed to communicate using eight different frequency channels (60, 66, 72, 76, 82.05, 86, 110 and 132.5 khz), four baud rates (600, 1200, 2400 and 4800 symbols per second) and two frequency deviations (1 and 0.5). many auxiliary functions are in tegrated. the transmission sectio n includes automatic control on pli output voltage and current, programmable time-out function and thermal shutdown. the reception section includes automatic input level control, carrier/ preamble detection and band-in-use signaling. additional features are included, such as watchdog timer, zero-crossing detector, internal oscillator and a general purpose op-amp. the serial interface (configurable as uart or spi) allows interfacing to a host microcontroller, intended to manage the communication protocol. a reset output (rsto) and a programmable 4-8-16 mhz clock (mclk) can be provided to the microcontroller to simplify the application. communication on the power line can be either synchronous or asynchronous with the data clock (clr/t) provided by the transceiver at the programmed baud rate. when in transmission mode (i.e. rxtx line at low level), the st7538q transceiver samples the data on the txd line, generating an fsk modulated signal on the ato pin. the same figure 3. st7538q transceiver block diagram
AN2744 st7538q fsk power line transceiver description 11/56 signal is fed into the differential power amplifier to get four times the voltage swing and a current capability up to 370 ma rms. when in reception mode (i.e. rxtx line at high level), an incoming signal at the rai line is demodulated and converted to a digital bit stream on the rxd pin. the internal control register, which contains the operating parameters of the st7538q transceiver, can be programmed only using the spi interface. the control register settings include the header recognition and frame length count functions, which can be used to apply byte and frame synchronization to the received messages.
evaluation tools description AN2744 12/56 4 evaluation tools description the complete evaluation environment for the st7538q power line communication consists of: ? 1 pc using the "st7538 power line modem demonstration kit" software tool ? 1 evalcommboard hosting an st7 microcontroller ? 1 st7538q dual channel reference design board (evalst7538dual) the correct procedure for connecting the evalst7538dual and the evalcommboard is as follows: 1. connect the evalst7538dual and the evalcommboard together 2. connect the ac cable to the evalst7538dual and the usb cable to the evalcommboard 3. connect the evalst7538dual to the mains supply 4. connect the evalcommboard to the pc via usb cable warning: follow the connection procedure to avoid damaging the boards! figure 4. complete evaluation system in cluding a pc, an evalcommboard and the evalst7538dual board usb/rs232 usb/rs232
AN2744 evaluation tools description 13/56 this complete communication node, controlled by the st7538q power line modem demonstration kit, implements real communication at bit level, simply sending or receiving a user-defined bit stream. it is possible to establish a half-duplex communication between two of these communication nodes connected to each other. for better evaluating communication performances, the st7538q power line modem demo kit software tool has some particular features, including: frame synchronization : a frame synchronization header can be added to the transmitted data to set up a simple protoc ol, intended to test the capability of the system to correctly receive the exact bit sequence as it has been transmitted. this feature can be enabled in the rx panel of the st7538q power line modem demonstration kit. a bit synchronization can be introduced as a simpler feature by enabling the preamble detection method in the control register panel and then inserting at least one "0101" or "1010" sequence at the beginning of the bit stream to be transmitted. ping session : a master-slave communication with automatic statistics calculation can be useful to test a point-to-point or a point-to-multipoint power line communication network, thus providing a method to evalua te reachability of each node in the network. for further details about the st7538q power line modem demonstration kit tool, please refer to user manual um0241 "st7538 power line modem demonstration kit graphical user interface?. figure 5. power line modem demonstration kit with transmission session window
board description AN2744 14/56 5 board description the st7538q dual channel reference design is composed of the following sections: ? power supply section, based on st?s viper12a-e ic ? st7538q modem and crystal oscillator section ? line coupling interface sect ion, with three subsections: ? dual channel transmission passive filter ? dual channel reception passive filter ? dual channel reception active filter the board has also two connectors, which allow the user to plug the mains supply on one side of the board and the ibu communication board on the other side. the schematics of the whole reference design are given in the following pages. figure 7 shows the modem and coupling interface circuits, while figure 8 represents the power supply circuit. in both schematics, high voltage regions are highlighted. ta bl e 3 lists the components used to develop the reference design board. all parts have been selected to give optimal performances. the layout of the printed circuit is shown in appendix a - figure 50 and figure 51 . figure 6. scheme of the various sections of the board st7538q modem section st7538q st7538q modem modem section section dual channel tx passive filter dual channel dual channel tx passive tx passive filter filter dual channel rx passive filter dual channel dual channel rx passive filter rx passive filter dual channel rx active filter dual channel dual channel rx active filter rx active filter power supply (with st viper 12a) power supply power supply (with st viper 12a) (with st viper 12a) connection to connection to c board c board connection to connection to mains supply mains supply st7538q modem section st7538q st7538q modem modem section section dual channel tx passive filter dual channel dual channel tx passive tx passive filter filter dual channel rx passive filter dual channel dual channel rx passive filter rx passive filter dual channel rx active filter dual channel dual channel rx active filter rx active filter power supply (with st viper 12a) power supply power supply (with st viper 12a) (with st viper 12a) connection to connection to c board c board connection to connection to mains supply mains supply
AN2744 board description 15/56 figure 7. modem and coupling interface schematic
board description AN2744 16/56 figure 8. power supply schematic high voltage section
AN2744 board description 17/56 table 3. bill of materials item q.ty reference value description 116 atop1, atop2, p5 v, 10 v, vadj, tx, rxtx, rxfo, rx, rai, gnd, clrt, cl, cd/pd, bu, ato test point 2 1 cn1 con50a 50-pin female connector 3 1 cn2 header 2 mains supply connector 4 1 c1 470 pf 630 v evox-rifa pfr5-471j630l4 5 1 c2 47 nf x2 epcos b32921-a2473k 61 c3 470 f 16 v electrolytic rubycon yk / yageo se-k / nichicon vk 7 1 c4 100 f 16 v tdk ckg57dx7r-1c107m 82 c5,c10 10 f 400 v electrolytic yageo se-k / nichicon vk 9 1 c6 2.2 nf y2 tdk cd12e2ga222myns 10 1 c8 47 nf 11 3 c9,c17,c21 10 f tdk c3216x7r-1c106m 12 2 c11,c12 270 pf 13 5 c13,c15,c18,c19,c24 100 nf 14 2 c14,c26 10 nf 15 1 c16 4.7 nf 16 1 c20 10 nf 17 1 c22 18 pf 18 1 c23 47 pf 19 1 c25 100 pf 20 1 c27 56 nf 50 v 21 1 c28 100 nf x2 10% epcos b32922-a2104k 22 1 c29 150 nf 23 1 c30 220 pf 24 1 d1 df06s 600 v - 1.5 a bridge rectifier 25 1 d2 green led 26 1 d3 stps1h100 27 1 d4 stth1l06a 28 1 d5 bas16 2l bas21 also suitable 29 1 d6 sm6t6v8ca 6.8 v bidirectional transil? diode 30 1 d7 esda6v1l 6.1 v esd transil? diode 31 1 d9 bzx84c8v2 8.2 v zener diode 32 1 f1 fuse 2 a time-lag (t)
board description AN2744 18/56 item qty reference value description 33 1 jp1 jumper leave open 34 2 jp2, jp3 jumper close 2-3 35 1 l1 33 h epcos b82462-a4333k 36 1 l2 2x10 mh - 0.3 a radiohm 42v15-0307 37 1 l3 470 h epcos b82442-a1474k 38 1 l4 1 mh epcos b82442-h1105k 39 1 l5 100 h 10% wrth 744-775-210k / epcos b82464-a4104k 40 1 l6 68 h 10% wrth 744-775-168k / epcos b82464-a4683k 41 1 l7 330 h 10% wrth 744-774-233k 42 1 l8 10 h epcos b82432-t1103k 43 2 q2, q4 2n7002 44 1 q3 bc857bl 45 1 r1 220 k 46 1 r2 1k5 47 1 r3 10r 1 w metal oxide - radial 48 1 r6 560 49 2 r8, r18 330 50 1 r9 1k2 51 1 r10 100 k 52 1 r11 4k7 53 1 r12 680 54 3 r13, r14, r15 5k1 55 2 r16, r17 1m 56 1 r19 2 k 57 1 r20 3k9 58 1 r21 3r3 59 1 r22 2k2 60 1 r23 10 k 61 1 t1 smps transformer tdk srw12.6es-exxh013 / wrth s06-100-057 62 1 t2 line transformer vac t60403-k5024-x044 / radiohm 69h14-2101 63 1 u1 sfh610-a optoswitch 64 1 u2 lca710 optoswitch - 3750 v isolation 65 1 u3 st7538q power line transceiver 66 1 u6 viper12as-e smps controller / switch 67 1 x1 16 mhz jauch q 16.0-ss2-16-30/50-fu table 3. bill of materials (continued)
AN2744 board description 19/56 table 4. st parts on the st7538q dual channel reference design board value description st7538q power line transceiver viper12as-e smps controller / switch stth1l06a ultrafast diode stps1h100 schottky diode sm6t6v8ca 6.8 v bidirectional transil? diode esda6v1l 6.1 v esd transil? diode
board description AN2744 20/56 5.1 line coupling interface the line coupling interface is composed of three different filters: the dual channel tx passive filter, the dual channel rx passive filter and the dual channel rx active filter. the coupling interface structure is represented in figure 9 . all three filters are described in section 5.1.2 , section 5.1.3 and section 5.1.3 . for each filter, calculations and measured frequency responses are given. the filters are quite sensitive to the components' value tolerance. actual components used in the st7538q dual channel reference design have the following tolerances: +/- 10% for coils and for the x2 capacitor +/- 1% for smd resistors +/- 5% for smd ceramic capacitors to evaluate sensitivity to the tolerances in dicated above, the follo wing sections include simulated responses of the filters with montecar lo statistical analysis. statistical simulation helps to understand the relationship between tolerance of components' value and variations figure 9. schematic of rx and tx filters tx passive filter rx passive filter rx active filter cminus 5v c15 100nf cout r15 5k1 r14 5k1 act_in cplus atop1 atop2 a ct_in ch2 p n 3 1 2 q2 2n7002 ch2 r8 330 rai 3 1 2 jp2 close 2-3 neg_ch2 jp1 leave opened 1 2 6 4 u2 lca710 r17 1m l5 100 uh r10 100k c11 270pf r13 5k1 r9 1k2 r12 680 c12 270pf 3 1 2 q4 2n7002 r16 1m 3 1 2 d7 esda6v1l 3 1 2 jp3 close 2-3 c16 4.7nf c20 10nf l7 330uh r18 330 c29 150 nf d6 sm6t6v8ca 1 8 4 5 t2 line transformer c28 100nf x2 l6 68 uh c27 56 nf r21 3.3 c14 10 nf tx passive filter rx passive filter rx active filter cminus 5v c15 100nf cout r15 5k1 r14 5k1 act_in cplus atop1 atop2 a ct_in ch2 p n 3 1 2 q2 2n7002 cminus 5v c15 100nf cout r15 5k1 r14 5k1 act_in cplus atop1 atop2 a ct_in ch2 p n 3 1 2 q2 2n7002 ch2 r8 330 rai 3 1 2 jp2 close 2-3 neg_ch2 jp1 leave opened 1 2 6 4 u2 lca710 r17 1m l5 100 uh r10 100k c11 270pf r13 5k1 r9 1k2 r12 680 c12 270pf 3 1 2 ch2 r8 330 rai 3 1 2 jp2 close 2-3 neg_ch2 jp1 leave opened 1 2 6 4 u2 lca710 r17 1m l5 100 uh r10 100k c11 270pf r13 5k1 r9 1k2 r12 680 c12 270pf 3 1 2 q4 2n7002 r16 1m 3 1 2 d7 esda6v1l 3 1 2 jp3 close 2-3 c16 4.7nf c20 10nf l7 330uh r18 330 c29 150 nf d6 sm6t6v8ca 1 8 4 5 t2 line transformer c28 100nf x2 l6 68 uh c27 56 nf r21 3.3 c14 10 nf
AN2744 board description 21/56 on frequency response of the filters. in simulation curves, the ideal response is drawn in blue, while red curves indicate statistical variations generated through simulation. 5.1.1 dual channel selection to obtain a dual channel interface, each filter is tunable via software command. the st7538q dual channel reference design has two available channel frequencies, 72 and 86 khz. the channel can be simply changed by including or excluding one passive component per each filter: an inductor for the tx filter, a capacitor for the rx passive filter and a resistor for the rx active filter. 5.1.2 dual channel tx passive filter the dual channel tx passive filter is made of the following parts: dc-decoupling capacitor c29, line transformer t2, inductors l5 and l6 and x2 safety capacito r c28, plus a shunt branch made of r21 and c27. the center frequency for the series resonance is calculated with good approximation as: equation 1 where c p = c29(c27+c28)/(c27+c28+c29) and l p is equal to: l6 for 72 khz channel, l6 // l5 for 86 khz channel. to guarantee adequate filtering action on signal harmonics, it is required to set the center frequency at a value lower than the one of the channel frequency. see figure 10 and figure 11 to check the resulting measured frequency response. l5 and l6 have been accurately chosen to have high saturation current (> 1 a) and low equivalent series resistance (< 0.5 ), to limit distortion and insertion losses. r21 is intended to damp resonance, to better control filtering action and getting desired rejection on transmitted signal harmonics. resonance shape is also affected by the ratio between the two capacitors c27 and c28. c27 must be smaller than c28 (in this case, about half the value of c28) to get lower insertion losses when the line impedance is very low. to optimize the coupling efficiency, particular attention must be paid to the line transformer. the required characteristics are listed in ta b l e 5 . in order to have a good power transfer and to minimize the insertion losses, it's recommended to choose a transformer with a primary (magnetizing) inductance greater than 1mh and a series resistance lower than 0.5 . another important parameter is the leakage inductance. if it has a relevant value (10 to 50 h), this can be used to design the coupling filter without adding series inductance (l5, l6). the drawback is that this parameter is usually affected by poor accuracy which can lead to a drift on the filter response and then to bad coupling. consequently, a low leakage inductance value (<1 h) has been chosen. the series inductance is fixed through discrete components, resulting in a greater accuracy. the last parameter specified in the table, the 4 kv insulation voltage requirement, is described and codified by the en50065-4-2 cenelec document. p p c c l 2 1 f ? ? =
board description AN2744 22/56 figure 10 and figure 11 show the measured response of the filter for both channels, loaded with the cispr reference network and with 5 impedance. when loaded with the cispr network, the tx passive filter gives an almo st flat gain of nearly 3.5 db around the transmission carrier frequency. applying a heavier load makes the frequency response sharper and the gain at carrier frequency lower. this effect leads to a loss of about 7-8 db with a 5 load for both channels. table 5. line coupling transformer specifications parameter value turn ratio 1:1 magnetizing inductance > 1 mh leakage inductance < 1 h dc total resistance < 0.5 dc saturation current > 2 ma interwinding capacitance < 50 pf withstanding voltage 4 kv figure 10. measured frequency response of the tx passive filter for 72 khz channel (typical) -40 -35 -30 -25 -20 -15 -10 -5 0 5 10 1e+04 1e+05 1e+06 freq (hz) gain (db) cispr 5 load -40 -35 -30 -25 -20 -15 -10 -5 0 5 10 1e+04 1e+05 1e+06 freq (hz) gain (db) cispr 5 load
AN2744 board description 23/56 simulations of the filter for both frequency channels, given in figure 12 and figure 13 , show limited effect by the components' tolerance. figure 11. measured frequency response of the tx passive filter for 86 khz channel (typical) -40 -35 -30 -25 -20 -15 -10 -5 0 5 10 1e+04 1e+05 1e+06 freq (hz) gain (db) cispr 5 load -40 -35 -30 -25 -20 -15 -10 -5 0 5 10 1e+04 1e+05 1e+06 freq (hz) gain (db) cispr 5 load figure 12. simulated frequency response of the tx passive filter for 72 khz channel with tolerance effect 1e5 1e4 1e6 -35 -30 -25 -20 -15 -10 -5 0 5 -40 10
board description AN2744 24/56 5.1.3 dual channel rx passive filter the dual channel rx passive filter is made of a resistor in series with a parallel l-c resonant circuit. the transfer function of the filter can be written as: equation 2 where r l is the dc series resistance of the inductor l7 (in the worst case, 2 ) and c p is the equivalent capacitance for the two channels: c16 + c20 for 72 khz, only c20 for 86 khz. the center frequency and the quality fact or of the filter can be expressed as: equation 3 the simplification done in equation 3 is possible because r 18 >> r l . it's evident that the quality factor, and then the filter selectiv ity, depends not only on the value of r 18 , but also on r l . a higher r l means a lower steepness of t he resonance, while a higher r 18 gives a figure 13. simulated frequency response of the tx passive filter for 86 khz channel with tolerance effect 1e5 1e4 1e6 -35 -30 -25 -20 -15 -10 -5 0 5 -40 10 t p 7 18 l 18 p 7 18 7 p l 18 2 p 7 18 l 7 c l r r r s c l r l c r r s c l r r l s ) s ( r ? ? + + ? ? ? + ? ? + ? ? + ? = p 7 p 7 18 l 18 c c l 2 1 c l r r r 2 1 2 1 fc ? ? ? ? + = ? =
AN2744 board description 25/56 higher selectivity. the values of the actual components give a q of about 2.2 for the 72 khz channel and 1.8 for the 86 khz channel. the value of r l impacts more obviously on insertion losses. to evaluate the relationship between r l and the losses on received signal, the following simplified expression of |r (s) | at f = f c can be used: equation 4 with the chosen components, this formula gives a loss always lower than 1 db. the same calculation gives unitary transfer if r l is set to zero. looking at the first way to express the module of the transfer function, it can be noticed that a higher q can help to keep the losses small. a high q would bring to a higher sensitivity of the filter to tolerance of the components. figure 14 and figure 15 show the measured frequency response of the rx passive filter for the two channels. the filter has an attenuation of about 5 db at center frequency. this loss is mostly due to the tx filter topology, in partic ular to the r21-c27 branch that is in parallel to the rx path. 7 p 18 l 18 7 c c l c r r 1 1 r l q ) f 2 j ( r ? ? + = ? ? ? ? figure 14. measured frequency response of the rx passive filter for 72 khz channel (typical) -18 -17 -16 -15 -14 -13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 1e+04 1e+05 1e+06 freq (hz) gain (db) -18 -17 -16 -15 -14 -13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 1e+04 1e+05 1e+06 freq (hz) gain (db)
board description AN2744 26/56 it can be observed from the simulation curves of figure 16 and figure 17 a maximum loss at center frequency of 1 db due to the spread of the components' value. figure 15. measured frequency response of the rx passive filter for 86 khz channel (typical) -18 -17 -16 -15 -14 -13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 1e+04 1e+05 1e+06 freq (hz) gain (db) -18 -17 -16 -15 -14 -13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 1e+04 1e+05 1e+06 freq (hz) gain (db) figure 16. simulated frequency response of the rx passive filter for 72 khz channel with tolerance effect 1e5 1e4 1e6 -17 -16 -15 -14 -13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1 -18 0 1 db 1e5 1e4 1e6 -17 -16 -15 -14 -13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1 -18 0 1 db
AN2744 board description 27/56 5.1.4 dual channel rx active filter an active filtering is su itable for receiving a highly attenuat ed signal. without the gain of an active filter, it could be impossible to detect a signal lower than the st7538q receiving sensitivity even filtering the no ise around it. therefore, the choice of the rx filter depends mostly on the attenuation introduced by the network and then on the point of insertion of the power line communication node. it is possible to choose the received signal path on the board by configuring the three jumpers shown in figure 9 (jp1, jp2 and jp3) in different ways. the rx path can include only the passive filter, only the active filter , both of them or ev en none (no filtering). figure 18 and figure 19 show the measured transfer function of the rx active filter for both channels. the curves show a 10 db gain at center frequency and a -3 db bandwidth of about 20 khz. figure 17. simulated frequency response of the rx passive filter for 86 khz channel with tolerance effect 1e5 1e4 1e6 -17 -16 -15 -14 -13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1 -18 0 1 db 1e5 1e4 1e6 -17 -16 -15 -14 -13 -12 -11 -10 -9 -8 -7 -6 -5 -4 -3 -2 -1 -18 0 1 db figure 18. measured frequency response of the rx active filter for 72 khz channel (typical) -8 -6 -4 -2 0 2 4 6 8 10 12 1.0e+04 1.0e+05 1.0e+06 freq (hz) gain (db) -8 -6 -4 -2 0 2 4 6 8 10 12 1.0e+04 1.0e+05 1.0e+06 freq (hz) gain (db)
board description AN2744 28/56 figure 20 and figure 21 show the simulation results with montecarlo analysis. the gain variation at center freque ncy is less than 2 db. figure 19. measured frequency response of the rx active filter for 86 khz channel (typical) -8 -6 -4 -2 0 2 4 6 8 10 12 1.0e+04 1.0e+05 1.0e+06 freq (hz) gain (db) -8 -6 -4 -2 0 2 4 6 8 10 12 1.0e+04 1.0e+05 1.0e+06 freq (hz) gain (db) figure 20. simulated frequency response of the rx active filter for 72 khz channel with tolerance effect 4e4 5e4 6e4 7e4 8e4 9e4 1e5 2e5 3e4 3e5 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 8 9 10 11 -8 12 fh 1.5 db 4e4 5e4 6e4 7e4 8e4 9e4 1e5 2e5 3e4 3e5 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 8 9 10 11 -8 12 fh 1.5 db
AN2744 board description 29/56 5.1.5 input impedance the input impedance of a power line communication node is another critical point. figure 22 through 25 show the curves of input impedance magnitude vs. frequency in both tx and rx mode for the two channels. the impedance magnitude values prove that the st7538q dual channel reference design board is compliant with en50065-7 normative, which sets the following minimum impedance constraints for this kind of equipment: ? tx mode: free in the range 3 to 95 khz, 3 from 95 to 148.5 khz ? rx mode: 10 from 3 to 9 khz, 50 between 9 and 95 khz only inside signal 20 db- bandwidth (free for frequencies outside signal bandwidth), 5 from 95 to 148.5 khz figure 21. simulated frequency response of the rx active filter for 86 khz channel with tolerance effect 4e4 5e4 6e4 7e4 8e4 9e4 1e5 2e5 3e4 3e5 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 8 9 10 11 -8 12 2 db 4e4 5e4 6e4 7e4 8e4 9e4 1e5 2e5 3e4 3e5 -7 -6 -5 -4 -3 -2 -1 0 1 2 3 4 5 6 7 8 9 10 11 -8 12 2 db figure 22. measured input impedance magnitude of the coupling interface in rx mode for the 72 khz channel (typical curve) 1 10 100 1000 1e+04 1e+05 1e+06 freq (hz) impedance modulus ( ) en50065 en50065 - - 7 7 1 10 100 1000 1e+04 1e+05 1e+06 freq (hz) impedance modulus ( ) 1 10 100 1000 1e+04 1e+05 1e+06 freq (hz) impedance modulus ( ) en50065 en50065 - - 7 7
board description AN2744 30/56 figure 23. measured input impedance magnitude of the coupling interface in rx mode for the 86 khz channel (typical curve) 1 10 100 1000 1e+04 1e+05 1e+06 freq (hz) impedance modulus ( ) en50065 en50065 - - 7 7 1 10 100 1000 1e+04 1e+05 1e+06 freq (hz) impedance modulus ( ) en50065 en50065 - - 7 7 figure 24. measured input impedance magnitude of the coupling interface in tx mode for the 72 khz channel (typical curve) 1 10 100 1000 1e+04 1e+05 1e+06 freq (hz) impedance modulus ( ) en50065 en50065 - - 7 7 1 10 100 1000 1e+04 1e+05 1e+06 freq (hz) impedance modulus ( ) en50065 en50065 - - 7 7
AN2744 board description 31/56 5.2 conducted disturbances 5.2.1 conducted emissions the en50065-1 standard describes test setup and procedures for this kind of test. the measures have been done with 220 vac main s voltage. the test pa ttern consists of a continuous transmission of a fixed tone at a frequency of 70.8 khz (72 khz center frequency minus half the fsk frequency deviation, in this case 2400 hz) which corresponds to a symbol "1". the output signal measured at the artificial network has a value of 120 dbv rms, which means a 2 v rms signal on the mains output of the board. the spectrum analyzer performs a peak measure instead of a quasi-peak measure. for continuous sinusoidal signals, the two types of measurement give the same result. figure 25. measured input impedance magnitude of the coupling interface in tx mode for the 86 khz channel (typical curve) 1 10 100 1000 1e+04 1e+05 1e+06 freq (hz) impedance modulus ( ) en50065 en50065 - - 7 7 1 10 100 1000 1e+04 1e+05 1e+06 freq (hz) impedance modulus ( ) en50065 en50065 - - 7 7
board description AN2744 32/56 figure 27 and figure 28 show the results for the output spectrum measurement. the en50065-1 disturbance limits mask is traced in red. it may be compared with the typical output spectrum of the st7538q dual channel reference design board for each channel. figure 26. conducted disturbance test setup figure 27. output spectrum (typical) at 72 khz channel, mains 220 v ac , fixed transmitted tone = "1" en50065 en50065 - - 1 1 30.0 40.0 50.0 60.0 70.0 80.0 90.0 100.0 110.0 120.0 130.0 1.0e+04 1.0e+05 1.0e+06 1.0e+07 1.0e+08 frequency (hz) output level (dbuv) f c =70.8 khz s=120.1 dbv 2f c =141.6 khz s=55.3 dbv 3f c =212.4 khz s=58.1 dbv en50065 en50065 - - 1 1 30.0 40.0 50.0 60.0 70.0 80.0 90.0 100.0 110.0 120.0 130.0 1.0e+04 1.0e+05 1.0e+06 1.0e+07 1.0e+08 frequency (hz) output level (dbuv) f c =70.8 khz s=120.1 dbv 2f c =141.6 khz s=55.3 dbv 3f c =212.4 khz s=58.1 dbv
AN2744 board description 33/56 5.2.2 noise immunity the tests on immunity against white noise and narrowband conducted interferences are based on two st7540 reference design boards performing a simplex (unidirectional) communication. the first board transmits a given bit sequence, while the receiving board passes the received bit stream to a pc bit error rate (ber) tester software, which evaluates the percentage of correctly received bits. the noise (white noise or sinusoidal interferer) is produced by a waveform generator and injected into the artificial netwo rk through an ac-coupling circuit. figure 29 illustrates the test environment used for noise immunity tests. figure 28. output spectrum (typical) at 86 khz channel, mains 220 v ac , fixed transmitted tone = "1" en50065-1 30.0 40.0 50.0 60.0 70.0 80.0 90.0 100.0 110.0 120.0 130.0 1.0e+04 1.0e+05 1.0e+06 1.0e+07 1.0e+08 frequency (hz) output level (db v) f c =84.8 khz s=120.1 dbv 2f c =169.6 khz s=58.6 dbv 3f c =254.4 khz s=50.3 dbv en50065-1 30.0 40.0 50.0 60.0 70.0 80.0 90.0 100.0 110.0 120.0 130.0 1.0e+04 1.0e+05 1.0e+06 1.0e+07 1.0e+08 frequency (hz) output level (db v) f c =84.8 khz s=120.1 dbv 2f c =169.6 khz s=58.6 dbv 3f c =254.4 khz s=50.3 dbv figure 29. narrowband conducted interference test setup
board description AN2744 34/56 ta bl e 6 gives the parameters for setting the test conditions. the received signal and noise level are measured with a spectrum analyzer at both the st7538q rai pin and the measurement port of th e cispr artificial network. to obtain the right value, the noise level is measured in absence of the transmitted signal. the 3 khz resolution bandwidth of the spec trum analyzer has been chosen to fit the spectrum of the transmitted fsk signal at 2400 baud. figure 30 represents the measured ber vs. snr curve at both rai pin and measurement port of the cispr network in presence of white noise. it may be noted that a ber of 10 -3 corresponds to a value of snr which is a little hi gher than 12 db, as it can be expected for a non-ideal fsk demodulator. the curve of figure 30 is valid for both 72 and 86 khz channels. table 6. noise immunity test settings parameter value received signal at rai pin 78 dbv rms frequency 72 khz baud rate 2400 deviation 1 detection method carrier with conditioning detection time 3 ms sensitivity high input filter off transmitted sequence aacc h s.a. resolution bw 3 khz figure 30. measured ber vs. snr curve (typical), white noise 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 6 7 8 9 10 11 12 13 14 15 16 17 18 snr (db) ber rai cispr 1.0e-06 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 6 7 8 9 10 11 12 13 14 15 16 17 18 snr (db) ber rai cispr
AN2744 board description 35/56 for narrowband interference tests, two types of interfering noise have been used: a pure sinusoidal tone and an amplitude-modulated signal, (modulating signal 1 khz, modulation depth 80%). in these tests, the amplitude of the noise tone (or the carrier, in case of modulated interferer) is varied un til the measured ber reaches 10 -3 (one error every 1000 transmitted bits). figure 31 shows the measured snr vs. frequency curves for both pure sinusoidal tone and am modulated interferer, with a fixed ber of 10 -3 . figure 31. measured snr vs. frequency curves (typical) at ber=10 -3 - 72 khz channel -45.0 -40.0 -35.0 -30.0 -25.0 -20.0 -15.0 -10.0 -5.0 0.0 5.0 10.0 30 40 50 60 70 80 90 100 freq (khz) snr (db) pure tone am 1khz 80% -45.0 -40.0 -35.0 -30.0 -25.0 -20.0 -15.0 -10.0 -5.0 0.0 5.0 10.0 30 40 50 60 70 80 90 100 freq (khz) snr (db) pure tone am 1khz 80% figure 32. measured snr vs. frequency curves (typical) at ber=10 -3 - 86 khz channel -45.0 -40.0 -35.0 -30.0 -25.0 -20.0 -15.0 -10.0 -5.0 0.0 5.0 10.0 50 60 70 80 90 100 110 120 freq (khz) snr (db) pure tone am 1khz 80% -45.0 -40.0 -35.0 -30.0 -25.0 -20.0 -15.0 -10.0 -5.0 0.0 5.0 10.0 50 60 70 80 90 100 110 120 freq (khz) snr (db) pure tone am 1khz 80%
board description AN2744 36/56 5.3 thermal design all heat dissipation is based on the heat exchange between the st7538q ic, the pcb and the environment. a large pcb copper area under the device is re commended in order to achieve a better heat transfer from the ic to the environment, see figure 33 . the metallic slug under the st7538q (the exposed pad of the pwtqfp44 package) must be properly soldered to the ground copper area on the pcb top side, as recommended in the datasheet. for the st7538q dual channel reference design, the dissipating area is nearly 1.5 cm2. the larger ground layer on the bottom side should be connected to the top side area through multiple via holes. even if the st7538q has an integrated therma l shutdown circuitry, turning off the power stage if the die temperature (t j ) surpasses 170 c, it is recommended that t j does not exceed 125 c to guarantee a safe condition for ic operation. the relationship between the junction temperature t j and the power dissipation during transmission pd is described by the following formula: t j (t tx , d) = t a - p d ja (t tx , d) where t a is the ambient temperatur e (from -45 to +85 c) and ja is the junction-to-ambient thermal impedance of the st7538q ic. the value of the thermal impedance depends on the length of the transmission (t tx ) and on the duty cycle d = t pkt /(t pkt +t idle ), assuming a packet-fragmented transmission as depicted in figure 34 . figure 33. pcb copper dissipating area for the st7538q dual channel reference design bottom layer top layer copper area soldering area multiple via holes large gnd layer bottom layer top layer copper area soldering area multiple via holes large gnd layer
AN2744 board description 37/56 when soldered to a proper copper area on the pcb, according to the suggestions previously given, the ic is characterized by a steady-state thermal impedance of about 35 c/w. nevertheless, as shown in figure 35 , the steady-state valu e is reached after a transient whose duration depends on the duty c ycle (d) of the transmission. in other words, a higher p d can be sustained if the transmission time is less than the transient completion time and if the duty cycle of the transmission is lower than 100%. actual dissipated power p d can be calculated as: p d = p in - p out where p in = v cc x i cc and p out = v outrms x i outrms . the value of v cc can be inferred from the i cc value according to the load regulation curve of the power supply, shown in figure 44 on page 45 in section 5.7 . considering the power consumption by receiving circuitry and linear regulators negligible for thermal analysis purposes, the current absorption from the power supply (i cc ) results are nearly equal to the pli output current to the load (i outrms ), so p d can be expressed as: p d = (v cc - v outrms ) x i outrms figure 34. packet-fragmented transmission t pkt t tx transmission in progress idle state t idle t pkt t tx transmission in progress idle state t idle figure 35. thermal impedance typical curve for the st7538q mounted on the reference design board 0 5 10 15 20 25 30 35 40 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 1.0e+03 time (s) ja ( o c/w) d=1 d=0.75 d=0.5 d=0.25 0 5 10 15 20 25 30 35 40 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 1.0e+03 time (s) ja ( o c/w) d=1 d=0.75 d=0.5 d=0.25
board description AN2744 38/56 therefore, once the output voltage is fixed by the v sense partitioning, the required p d can be calculated as a function of the load current (i outrms ). the resulting value can be compared with the dissipation limit imposed by the ja value, as a function of t tx and duty cycle, to keep the junction temp erature below the 125 c limit. 5.4 oscillator section the st7538q crystal oscillator circuitry is ba sed on a mos amplifier working in inverter configuration. this circuitry requires a crystal having a maximum load capacitance of 16 pf and a maximum esr of 40 . it is very important to keep the crystal oscillato r and the load capacitors as close as possible to the device. the resonant circuit must be far away from noise sources such as: power supply circuitry burst and surge protections mains coupling circuits any pcb track or via carrying a signal to properly shield and separate the oscillator section from the rest of the board, it is recommended to use a ground plan e, on both sides of the pcb, filling all the area below the crystal oscillator and its load capacitors. no tracks or via holes, except for the crystal connections, should cross the ground plane. it is also recommended to use a large clearance on the oscillator-related tracks, to minimize humidity problems, see figure 36 . connecting the case to ground is also a good practice to reduce the effect of radiated signals on the oscillator. figure 36. a recommended oscillator section layout for noise shielding 25 sgnd 26 xout 27 xin st7538q top layer bottom layer clearance 25 sgnd 26 xout 27 xin st7538q top layer bottom layer clearance
AN2744 board description 39/56 5.5 surge and burst protection the specific structure of the coupling interface circuit of the application is a weak point against high voltage disturbances that can come from the external environment. in fact an efficient coupling circuit with low insertion losses realizes consequently a very low impedance path from the mains to the power line interface of the device. for this reason it's recommended to add some specific protections on the mains coupling path, in order to prevent high energy disturbances coming from the mains from damaging the internal power circuitry of the st7538q. the possible environments for this kind of application can be both indoor and outdoor: residential, commercial and light-i ndustrial locations. to verify the immunity of the system to environmental electrical phenomena, a series of immunity specificatio n standards and tests must be applied to the power line application. the requirements for ac-connected ports include en610000-4-4 (electric fast transients), en610000-4-5 (surges) , en610000-4-6 (rf ou t-of-band disturbanc es), en610000-4-11 (voltage dips). all these tests are listed in the en50065-2-3 document (part 7, immunity specifications). in particular, surge tests are specified as both common and differential mode at level +/- 4 kv, with pulse shape 1.2 x 50 s. fast transie nt burst tests are specified at level +/- 2 kv, with pulse shape 5 x 50 ns and pulse frequency 5 khz. figure 37 and figure 38 illustrate the protection criter ia implemented in the st7538q reference design. figure 37 shows the protection against common mode disturbances. the esd transil? protection diodes are able to absorb quickly fast transient disturbances starting from their 6.1 v threshold voltage. figure 38 describes the protection intervention in case of differential mode disturbances. a differential voltage higher than 6.8 v is shorte d by the bidirectional power transil?, which is the most robust protection and also the one that is able to absorb most of the energy of any incoming disturbance. figure 37. common mode disturbances protection atop1 atop2 n p 3 1 2 1 8 4 5 atop1 atop2 n p 3 1 2 1 8 4 5
board description AN2744 40/56 5.6 50-pin connector for communication board the st7538q transceiver requires external digital control to perform communication. this is done through an st7 microcontroller which is accommodated on the ibu communication board (see section 4 ). the communication with the st7 microcontro ller involves several signals, which can be gathered into 3 groups: digital signals, analog signals and power connections. the signals for each group are listed in ta b l e 7 , ta bl e 8 and ta bl e 9 . beside the st7538q input and output signals, the link to the ibu communication board includes: ? a 2-bit (b_id_plm_1 and b_id_plm_0) board identification code, which identifies the hosted power line transceiver. the "00" hw binary configuration makes the microcontroller able to recognize the st7538q reference design board. ? a vddf_force signal that forces the microc ontroller to refer digi tal interface levels to vddf (vdd) supply voltage provided by the st7538q reference design board. this way both the modem and the microcontroller communicate on the same digital levels. figure 38. differential mode disturbances protection atop1 atop2 n p 3 1 2 1 8 4 5 atop1 atop2 n p 3 1 2 1 8 4 5
AN2744 board description 41/56 figure 39. scheme of the communication board connector b_id_plm_0 b_id_plm_0 gnd b_id_plm_1 b_id_plm_1 gnd vddf_force vdd vddf ch2 bu neg_ch2 tx d tout rxd reg_data clrt cd/pd zcout rxtx reg_ok mclk wd reset pg 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 cn1 con50a p10v plm_10v table 7. 50-pin connector digital signals pin n signal name desc ription generated by 3 mclk oscillator output (programmable) st7538q 8 reset reset out for mi crocontroller st7538q 11 regok register ok signal st7538q 14 neg_ch2 secondary channel select (active low) c 18 ch2 secondary channel select (active high) c 35 cd/pd carrier or preamble detected signal st7538q 37 reg/data register or data access c 39 rxd serial data out st7538q 41 rxtx reception or transmission select signal c 43 zcout zero-crossing detection output st7538q 45 clr/t serial data clock st7538q 46 wd watchdog counter reset c 47 tout timeout / thermal protection event signal st7538q 48 bu band in use detection signal st7538q 49 txd serial data input c 50 pg power good signal st7538q
board description AN2744 42/56 5.7 power supply the st7538q dual channel reference design in cludes a specifically designed switching mode power supply circuit, based on st?s viper12as-e device. viper12as-e is a smart power device with curr ent mode pwm controller, startup circuit and protections integrated in a monolithic chip us ing vipower m0 technology. it includes a 27 mosfet with 730 v breakdown voltage and a 400 ma peak drain current limitation. the switching frequency is internally fixed to 60 khz, in order to provide a good compromise between emi performances and magnetic parts dimensioning. the internal control circuit offers the following benefits: - large input voltage range on vdd pin ac commodates changes in supply voltage - automatic burst mode in low load condition - overload and short circuit protection in hiccup mode the power supply is designed in isolated flyback configuration with secondary regulation by means of an optocoupler and a zener diode, co nsidering the requested output tolerance for the specified application. the main specificat ions are listed in ta b l e 1 0 in the input stage, an emi filter is implemented (c2, l2, c10, l3, c5) for both differential and common mode noise, in order to fit the requested standard. table 8. 50-pin connector control signals pin n signal name description generated by 20 b_id_plm_1 board id for plm applications (msb) plc board 28 b_id_plm_0 board id for plm applications (lsb) plc board 5 vddf_force force c digital level to vddf plc board table 9. 50-pin connector power connections pin n signal name description generated by 2 plm_10v 10v power supply plc board 4 vdd 3.3v/5v power supply st7538q 6 vddf digital power supply st7538q 22,34 gnd ground - table 10. smps specifications parameter value input voltage range, v in 85-265 v ac output voltage, v out 10v10% peak output current, i out(max) 600 ma
AN2744 board description 43/56 the blocking diode d4 and the clamping network (r1-c1) clamp the peak of the leakage inductance voltage spike, assuring reliable operation of the viper12as-e. d4 must be not only very fast-recovery but also very fast turn -on type to avoid additional drain overvoltage. the clamp capacitor c1 must be low-loss type (with polypr opylene or polystyrene film dielectric) to reduce power dissipation and preven t overheating, since it is charged with high peak currents by the energy st ored in the leakage inductance. also a leading edge blanking (leb) circuit for leakage inductance spikes filtering has been implemented (q3 - c30 - r23). it blanks the spike appearing at the leading edges of the voltage generated by the self-supply winding, greatly improving the behavior in short - circuit. the output rectifiers have been selected co nsidering the maximum reverse voltage and the rms secondary current. a stps1h100 power sc hottky rectifier has been chosen for this purpose. a lc filter has been added on the output (made of l1 and c4) in order to filter the high frequency ripple without increasing the output capacitors size or quality. the transformer used for this application has th ree windings, since one of them is needed to supply the viper12as-e. the primary inductance has been chosen at 2.7 mh and the reflected voltage has been set to 80 v. a layer type has been chosen, with ef12.6 or e13/7/4 core. the characteristics are listed in ta bl e 1 1 . in the following pictures some significant waveforms are represented. figure 40 and figure 41 show typical waveforms in both o pen load and full load conditions. an important behavior in any smps is the protec tion against output short circuit. all tests have been done by shorting the smps output at maximum input voltage. the results are shown in figure 42 . the main parameters are the drain-source voltage (v ds ), the output current (i out ) and the supply voltage (v dd ). the output current is an important parameter to be checked during shorts. although the output current peaks are quite high, the mean value is very low, thus preventing component melting for excessive dissipation. in this way, the output rectifier, transformer windings and pcb traces won't be overstresse d. this assures syst em reliability agains t long-term shorts. besides, in case of device overheating, the integrated thermal protection stops the device operation until the device temperature falls. table 11. smps transformer specifications parameter value core geometry srw12.6es or e13/7/4 primary inductance 2.7 mh10% leakage inductance 180 h max n p 224 turns ? 0.1mm n aux 39 turns ? 0.1mm n sec 31 turns ? 0.2mm (tex-e wire) withstanding voltage 4 kv rms
board description AN2744 44/56 the startup phase could also be critical for the smps as output overshoot occurs if the circuit is not properly designed. care must be taken in designing a proper clamp network in order to prevent voltage spikes due to leakage inductance from exceeding the breakdown voltage of the device (730 v minimum value). the startup transient is shown in figure 43 . note that the maximum drain-source voltage doesn't exceed the minimum breakdown voltage bvdss, with a reasonable safety margin. finally, load regulati on is presented in figure 42 and figure 43 for different load conditions. the voltage ranges from 10 v to 9. 3 v, within the re quested tolerance. figure 40. typical waveforms at 230 v ac : open load figure 41. typical waveforms at 230 v ac : full load ch1 freq - 9.62khz; ch2 mean - 9.90v ch1 freq - 57.71khz; ch2 mean - 13.79v; ch4 max - 503ma i out v dd v ds i out v dd v ds v ds i out v dd v ds i out v dd figure 42. typical waveforms at 265 v ac : short-circuit figure 43. typical waveforms at 265 v ac : startup ch2 freq - 23.50hz; ch4 max - 2.08a; ch4 mean - 383ma ch1 max - 702v; ch2 mean - 19.72v; ch4 max - 500ma v ds v dd i out v ds v dd i out v ds i out v dd v ds i out v dd
AN2744 board description 45/56 figure 44 shows the efficiency vs. output current curve. minimum efficiency occurs at low load condition, as expected from any smps. this is not an issue for our application, since low efficiency corresponds also to low power consumption and thus to low dissipation. on the other hand, at full load condition the efficiency is reduced because of the losses due to r1 (series input resistor limiting in-rush current) and to the filtering on both primary and secondary side. filtering is more important than efficiency because a power line communication appliance has very restrictive electromagnetic distur bance limits and it's also highly sensitive to noise coming from the power supply. figure 44. load regulation 8.9 9 9.1 9.2 9.3 9.4 9.5 9.6 9.7 9.8 9.9 10 10.1 10.2 10.3 10.4 10.5 0 100 200 300 400 500 600 i out [ma] v out [v] 185 v ac 230 v ac 265 v ac 8.9 9 9.1 9.2 9.3 9.4 9.5 9.6 9.7 9.8 9.9 10 10.1 10.2 10.3 10.4 10.5 0 100 200 300 400 500 600 i out [ma] v out [v] 185 v ac 230 v ac 265 v ac figure 45. smps efficiency curve 0.57 0.59 0.61 0.63 0.65 0.67 0.69 0.71 0.73 50 100 150 200 250 300 350 400 450 500 550 600 i out [ma] 0.57 0.59 0.61 0.63 0.65 0.67 0.69 0.71 0.73 50 100 150 200 250 300 350 400 450 500 550 600 i out [ma]
performance and ping tests AN2744 46/56 6 performance and ping tests our evaluation environment includes a ping test embedded into the demonstration software and the communication board firmware. this feature allows to perform in-field communication tests and to evaluate reachability of plc network nodes. a ping session is based on a master board send ing to one or more slave boards a sequence of messages. if the messages are correctly received by the slave boards, they are resent one by one to the master. the pc.connected to the master keeps stat istics of the messages sent and correctly received by the slave boards, making it possible to get a numerical evaluation of the reachability of each node corresponding to a slave. figure 46 represents the ping window of the demo nstration software tool for the master node. the main characteristics of this tool are indicated in red. special controls are included in the ping test: ? repetition control: r epetition can be used to improve reliability of the communication. when enabled, if a message is not responded by a slave, it will be re-sent up to three times before sending a new message. ? medium access control: defines what type of medium access has to be used. choices are "none", "bu" or "pd". in the last two cases, messages are sent to slave only if bu or cd/pd lines of the st7538q modem are not active. if pd setting is selected, content of the st7538q internal control regi ster is changed to select "preamble" as the detection method. for further details about the st7538q demonstration software tool, please refer to um0241 "st7538 power line modem demo kit gui - user guide". figure 46. demonstration software window for the master board repetition control medium access control last message status numerical statistics graphical statistics number of slaves (up to 255) number of messages repetition control medium access control last message status numerical statistics graphical statistics number of slaves (up to 255) number of messages
AN2744 application ideas 47/56 7 application ideas 7.1 three-phase architecture the st7538q modem can be used to communicate on a three-phase network. a microcontroller should switch communication between the three phases, since the modem can transmit/receive over only one phase at a time. in the example scheme of figure 47 , the microcontroller uses th ree output lines as enable signals for three switches (typically opto-switches), one for each phase line. for the modem, there is no difference with respect to single-phase communication. 7.2 received signal strength indication (rssi) in many application fields, measuring the strength of the incoming signal is useful to: 1. evaluate the snr (signal-to-noise ratio) at the node 2. choose the best routing through the network (if repeaters are allowed) a possible received signal strength indicator (rssi) implementation is the one depicted in figure 48 , where a peak detector is used to measur e the amplitude of the incoming signal. figure 47. scheme of principle for three-phase architecture ph1 ph3 ph2 neutral t r controller st7538 enable ph1 enable ph2 enable ph3 rai rx and tx filters atop1 atop2 ph1 ph3 ph2 neutral t r controller st7538 enable ph1 enable ph2 enable ph3 rai rx and tx filters atop1 atop2
application ideas AN2744 48/56 the schematic above is based on a simple diod e-capacitor (d1-c1) circuit improved with an lm393 comparator so that: the comparator eliminates the diode reverse voltage the feedback network (r3/r2) introduces a gain of 4 to improve the performance against low amplitude signals in the end this circuit gives on dc_out line a dc voltage proportional to the ac peak to peak level at the input. figure 49 shows the measured behavior of this circuit with a given pure sinusoidal waveform at the input. th e dc_out signal shall be converted by the application microcontroller through an integrated a/d converter. figure 48. peak detector electrical schematic rx_in r1 100k r2 18k r3 82k r4 4.7k + - u1a lm393 3 1 8 4 2 5v d1 1n4148 c1 100n dc_out rx_in r1 100k r2 18k r3 82k r4 4.7k + - u1a lm393 3 1 8 4 2 5v d1 1n4148 c1 100n dc_out figure 49. measured dc_out vs. ac_in peak detector performance 0 500 1000 1500 2000 2500 3000 0 200 400 600 800 1000 1200 ac_in [mvpp] dc_out [mv] 0 500 1000 1500 2000 2500 3000 0 200 400 600 800 1000 1200 ac_in [mvpp] dc_out [mv]
AN2744 application ideas 49/56 7.3 110-132.5 khz dual channel coupling circuit in this paragraph the dual channel application circuit for cenelec band b and c is suggested. the 110 and 132.5 khz channel fr equencies of the st7538q transceiver are suitable for home automation applications and in general for applications not subject to the european amr regulations. ta bl e 1 2 gives the values for changing a few components to obtain a dual channel line coupling interface at 110 khz (ch1) and 132.5 khz (ch2) table 12. list of components to be modified for the 110-132.5 khz dual channel coupling reference value l5 47 h l6 22 h l7 220 h c16 2.2 nf c20 6.8 nf c27 82 nf c29 220 nf r18 390 r21 6.8
troubleshooting AN2744 50/56 8 troubleshooting in this section the most frequent ly asked questions are described. 1. problem : the st7538q reference design board doesn't work at all. what to check : a) check that the ac mains supply cable is well connected to cn2. b) check if the green led d2 is on. c) check voltage on the 10 v test point near the st7538q. the value must be 9 to 11 v. 2. problem : the st7538q reference design board is not responding. what to check: a) check the vdc 5 v voltage output. spurious voltage spikes can cause dips on the vdc line. this could force a shutdown of the tx circuitry if the vdc voltage goes below 1.5 v. the solution is to force a power-off by mains disconnection. b) verify if mclk selected frequency is present to check whether the st7538q is working. c) verify the connection between the refe rence design board and the communication board and between the communication board and the pc. 3. problem : the st7538q reference design board does not transmit. what to check : a) check the voltage on atop 1 and atop2 test points wi th the oscilloscope ground probe connected to the avss signal grou nd. programmed carrier frequency must be present on both lines. b) check that programmed board channel (ch1/ch2) is matching the carrier frequency selected through the control register panel of the reference design software window. c) check that there is no short-circuit impedance on the mains at the selected transmitting channel. d) check cl voltage. cl voltage fixes the cu rrent limiting th reshold. it has to be lower than 1.9 v, otherwise the ic is put in current limit mode. if current limit mode is forced on the transcei ver, check the value of r19 feedback resistor and if there are any short circuits in the transmission path on the board. 4. problem : the st7538q reference design board transmits only for a short while. what to check : a) check transmission time-out setting. it has to be disabled for continuous transmission. b) check if continuous or single sequence tr ansmission is selected in the tx panel of the reference design software window. select continuous mode to be able to force a lasting transmission. c) check if zero-crossing function is enabled. if yes, verify the zcout synchronization bit. d) check that there is no short-circuit impedance on the mains at the selected transmitting channel. 5. problem : the st7538q reference design board does not receive.
AN2744 troubleshooting 51/56 what to check : a) check if jp2 and jp3 are closed. please refer to section 5.1 for receiving path configuration. b) check if carrier frequen cy is present on rai pin vo ltage with the oscilloscope ground probe connected to the avss signal ground pin. c) check that programmed board channel (ch1/ch2) is matching the carrier frequency selected through the control register panel of the reference design software window. d) check preamble detection setting on the control register panel of the reference design software window. e) check if data are present on rxd pin. 6. problem : during a ping test or a transmissi on test, the st7538 q reference design board shows a high bit error rate. note: this point refers to a half-duplex communication involving two st7538q reference design boards communicating with each other. what to check : a) check that both reference design boards are programmed to transmit/receive on the same carrier frequency. b) check on both reference design boards that programmed board channel (ch1/ch2) is matching the ca rrier frequency selected through the control register panel of the reference design software window. c) check preamble detection setting on the control register panel of the reference design software window. d) check if data are present on rxd pin.
list of normative references AN2744 52/56 9 list of normative references en50065 : signaling on low voltage electrical installations in the frequency range 3 khz to 148.5 khz ?part 1 : general requirements, frequency bands and electromagnetic disturbances ? part 2-1 : immunity requirements ? part 4-2 : low voltage decoupling filters - safety requirements ?part 7 : equipment impedance
AN2744 board layout 53/56 appendix a board layout figure 50. pcb layout - top view
board layout AN2744 54/56 figure 51. pcb layout - bottom view
AN2744 revision history 55/56 10 revision history table 13. document revision history date revision changes 30-apr-2008 1 initial release.
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